| Optimal design of a new cascaded multilevel inverter topology with reduced switch count MD Siddique, S Mekhilef, NM Shah, MA Memon IEEE Access 7, 24498-24510, 2019 | 87 | 2019 |
| A new multilevel inverter topology with reduce switch count MD Siddique, S Mekhilef, NM Shah, A Sarwar, A Iqbal, MA Memon IEEE Access 7, 58584-58594, 2019 | 70 | 2019 |
| Low switching frequency based asymmetrical multilevel inverter topology with reduced switch count MD Siddique, S Mekhilef, NM Shah, A Sarwar, A Iqbal, M Tayyab, ... IEEE Access 7, 86374-86383, 2019 | 64 | 2019 |
| A new switched capacitor 7L inverter with triple voltage gain and low voltage stress MD Siddique, S Mekhilef, NM Shah, JSM Ali, F Blaabjerg IEEE Transactions on Circuits and Systems II: Express Briefs 67 (7), 1294-1298, 2019 | 34 | 2019 |
| A single DC source nine-level switched-capacitor boost inverter topology with reduced switch count MD Siddique, S Mekhilef, NM Shah, N Sandeep, JSM Ali, A Iqbal, ... IEEE Access 8, 5840-5851, 2019 | 28 | 2019 |
| Dual input switched-capacitor-based single-phase hybrid boost multilevel inverter topology with reduced number of components M Rawa, MD Siddique, S Mekhilef, NM Shah, H Bassi, ... IET Power Electronics 13 (4), 881-891, 2019 | 24 | 2019 |
| A new single‐phase cascaded multilevel inverter topology with reduced number of switches and voltage stress MD Siddique, S Mekhilef, NM Shah, A Sarwar, MA Memon International Transactions on Electrical Energy Systems 30 (2), e12191, 2020 | 23 | 2020 |
| A new single phase single switched-capacitor based nine-level boost inverter topology with reduced switch count and voltage stress MD Siddique, S Mekhilef, NM Shah, JSM Ali, M Meraj, A Iqbal, ... IEEE Access 7, 174178-174188, 2019 | 23 | 2019 |
| Reduced Switch Count Based Single Source 7L Boost Inverter Topology MD Siddique, JSM Ali, S Mekhilef, A Mustafa, N Sandeep, D Almakhles IEEE Transactions on Circuits and Systems II: Express Briefs 67 (12), 3252-3256, 2020 | 15 | 2020 |
| Dual asymmetrical dc voltage source based switched capacitor boost multilevel inverter topology MD Siddique, S Mekhilef, A Sarwar, A Alam, NM Shah IET Power Electronics 13 (7), 1481-1486, 2020 | 15 | 2020 |
| Single phase step-up switched-capacitor based multilevel inverter topology with SHEPWM MD Siddique, S Mekhilef, S Padmanaban, MA Memon, C Kumar IEEE Transactions on Industry Applications, 2020 | 14 | 2020 |
| Single phase symmetrical and asymmetrical design of multilevel inverter topology with reduced number of switches MD Siddique, A Mustafa, A Sarwar, S Mekhilef, NBM Shah, ... 2018 IEEMA Engineer Infinite Conference (eTechNxT), 1-6, 2018 | 13 | 2018 |
| Design and implementation of a hybrid single T-type double H-bridge multilevel inverter (STDH-MLI) topology M Rawa, MD Siddique, S Mekhilef, N Mohamed Shah, H Bassi, ... Energies 12 (9), 1810, 2019 | 11 | 2019 |
| 7L-SCBI topology with minimal semiconductor device count BP Reddy, MD Siddique, A Iqbal, S Mekhilef, S Rahman, PK Maroti IET Power Electronics 13 (14), 3199-3203, 2020 | 10 | 2020 |
| Performance analysis of carrier based PWM technique for three level diode clamped multilevel inverter with different reference signals MD Siddique, A Sarwar 2016 IEEE 7th Power India International Conference (PIICON), 1-6, 2016 | 10 | 2016 |
| Switched-capacitor-based boost multilevel inverter topology with higher voltage gain<? show [AQ="" ID=" Q1]"?><? show [AQ="" ID=" Q6]"? MD Siddique, S Mekhilef, NM Shah, JSM Ali, M Seyedmahmoudian, ... IET Power Electronics 13 (14), 3209-3212, 2020 | 8 | 2020 |
| An improved asymmetrical multilevel inverter topology with reduced semiconductor device count Z Sarwer, MD Siddique, A Iqbal, A Sarwar, S Mekhilef International Transactions on Electrical Energy Systems 30 (11), e12587, 2020 | 7 | 2020 |
| A new configurable topology for multilevel inverter with reduced switching components MD Siddique, A Iqbal, MA Memon, S Mekhilef IEEE Access 8, 188726-188741, 2020 | 7 | 2020 |
| Design and implementation of a new unity gain nine-level active neutral point clamped multilevel inverter topology MD Siddique, A Iqbal, JSM Ali, S Mekhilef, DJ Almakhles IET Power Electronics 13 (14), 3204-3208, 2020 | 6 | 2020 |
| Asymmetrical multilevel inverter topology with reduced number of components MD Siddique, S Mekhilef, NM Shah, A Sarwar, MA Memon, ... 2018 IEEE International Conference on Power Electronics, Drives and Energy …, 2018 | 6 | 2018 |
Prof. Dr. Saad MekhilefProfessor of Electrical Engineering, University of Malaya and Swinburne University of TechnologyVerified email at um.edu.my
