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Fabio Luis Livi Ramos
Fabio Luis Livi Ramos
Verified email at unipampa.edu.br
Title
Cited by
Cited by
Year
High-throughput binary arithmetic encoder using multiple-bypass bins processing for HEVC CABAC
FLL Ramos, B Zatt, M Porto, S Bampi
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
192018
Residual syntax elements analysis and design targeting high-throughput HEVC CABAC
FLL Ramos, AVP Saggiorato, B Zatt, M Porto, S Bampi
IEEE Transactions on Circuits and Systems I: Regular Papers 67 (2), 475-488, 2019
182019
A high throughput cavlc hardware architecture with parallel coefficients processing for hdtv h. 264/avc enconding
FLL Ramos, B Zatt, TL Silva, A Susin, S Bampi
2010 17th IEEE International Conference on Electronics, Circuits and Systems …, 2010
132010
Low-power hardware design for the HEVC binary arithmetic encoder targeting 8K videos
FLL Ramos, J Goebel, B Zatt, M Porto, S Bampi
2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2016
112016
Low-power HEVC Binarizer architecture for the CABAC block targeting UHD video processing
C de Matos Alonso, FLL Ramos, B Zatt, M Porto, S Bampi
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design …, 2017
82017
Low-power multi-size HEVC DCT architecture proposal for QFHD video processing
LVM Bonatto, FLL Ramos, B Zatt, M Porto, S Bampi
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design …, 2017
82017
High-performance design for the AV1 multi-alphabet arithmetic decoder
JS Gomes, FLL Ramos
2021 34th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems …, 2021
72021
Energy-throughput configurable design for video processing binary arithmetic encoder
FLL Ramos, B Zatt, M Porto, S Bampi
IEEE Transactions on Circuits and Systems for Video Technology 31 (3), 1163-1177, 2020
72020
High-throughput and low-power architectures for the AV1 arithmetic encoder
TP Bitencourt, FLL Ramos, S Bampi
2021 34th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems …, 2021
62021
Novel multiple bypass bin scheme and low-power approach for HEVC CABAC binary arithmetic encoder
FLL Ramos, B Zatt, MS Porto, S Bampi
Journal of Integrated Circuits and Systems 13 (3), 1-11, 2018
62018
Novel multiple bypass bins scheme for low-power UHD video processing HEVC binary arithmetic encoder architecture
FLL Ramos, B Zatt, MS Porto, S Bampi
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design …, 2017
62017
Power-saving 8k real-time av1 arithmetic encoder architecture
TP Bitencourt, FLL Ramos, S Bampi
IEEE Design & Test 39 (6), 128-137, 2022
52022
HEVC residual syntax elements generation architecture for high-throughput CABAC design
AVP Saggiorato, FLL Ramos, B Zatt, M Porto, S Bampi
2018 25th IEEE International Conference on Electronics, Circuits and Systems …, 2018
52018
Power-Throughput Trade-off Analysis for a Novel Multi-Boolean AV1 Arithmetic Encoder Design
TP Bitencourt, FLL Ramos, S Bampi
2022 Picture Coding Symposium (PCS), 25-29, 2022
32022
Area and power efficient 8K real-time design for AV1 arithmetic decoding
JS Gomes, TP Bitencourt, S Bampi, FLL Ramos
2022 Picture Coding Symposium (PCS), 7-11, 2022
32022
AV1 Residual Syntax Elements Assessment and Efficient VLSI Architecture
JS Gomes, RN Wuerdig, FLL Ramos, S Bampi
2023 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems …, 2023
22023
Low-power high-throughput architecture for av1 arithmetic decoder
JS Gomes, TP Bitencourt, S Bampi, FLL Ramos
IEEE Design & Test 39 (6), 119-127, 2022
22022
Implementação e validação de IP soft cores para interfaces Ethernet 10/100 e 1000 MBPS sobre dispositivos reconfiguráveis
C Horna, F Ramos, M Barcelos, R Reis
Proceedings of the 13th Workshop Iberchip, 2007
22007
Analysis of AV1 Arithmetic Decoder Design Space with a Novel Multi-Boolean Approach
JS Gomes, TP Bitencourt, S Bampi, FLL Ramos
2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS), 1-4, 2023
12023
Statistical Analysis of VVC Residual and Entropy Coding aiming Efficient Hardware Design
GB Cardoso, DF Tomm, JS Gomes, RN Wuerdig, S Bampi, FLL Ramos
2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS), 1-5, 2024
2024
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