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Maher Assaad
Maher Assaad
Prof. in Electrical Engineering at Ajman University
Verified email at ajman.ac.ae - Homepage
Title
Cited by
Cited by
Year
An arithmetic-trigonometric optimization algorithm with application for control of real-time pressure process plant
PAM Devan, FA Hussin, RB Ibrahim, K Bingi, M Nagarajapandian, ...
Sensors 22 (2), 617, 2022
402022
Design and Characterization of Automated Color Sensors System
M Assaad, I Yohannes, A Bermak, D Ginhac, F Meriaudeau
International Journal on Smart Sensing and Intelligent Systems, 2014
272014
Monitoring of fruit freshness using phase information in polarization reflectance spectroscopy
M Sarkar, N Gupta, M Assaad
applied optics 58 (23), 6396-6405, 2019
182019
Wearable Wristworn Gesture Recognition Using Echo State Network
W Wang, X Liang, M Assaad, H Heidari
26th IEEE International Conference on Electronics Circuits and Systems, 2019
132019
Ultra low power, harsh environment SOI-CMOS design of temperature sensor based threshold detection and wake-up IC
M Assaad, P Gérard, LA Francis, D Flandre
2010 IEEE International SOI Conference (SOI), 1-2, 2010
112010
Design and modeling of low-power clockless serial link for data communication systems
MH Alser, MM Assaad
2011 National Postgraduate Conference, 1-5, 2011
102011
An interface circuit design based on differential capacitive sensors for accurate measurement of water contents in crude oil
M Assaad, MZ Aslam
2012 IEEE International Conference on Circuits and Systems (ICCAS), 263-266, 2012
82012
An FPGA-based design and implementation of an all-digital serializer for inter module communication in SoC
M Assaad, M Alser
IEICE Electronics Express 8 (23), 2017-2023, 2011
82011
Hybrid Harris Hawks with sine cosine for optimal node placement and congestion reduction in an industrial wireless mesh network
HQA Abdulrab, FA Hussin, I Ismail, M Assaad, A Awang, H Shutari, ...
IEEE Access 11, 2500-2523, 2023
72023
Wearable Resistive-based Gesture-Sensing Interface Bracelet
Y Chen, X Liang, M Assaad, H Heidari
Int. Conference on UK - China Emerging Technologies (UCET 2019), 2019
72019
Design of an All‐Digital Synchronized Frequency Multiplier Based on a Dual‐Loop (D/FLL) Architecture
M Assaad, MH Alser
VLSI Design 2012 (1), 546212, 2012
62012
Design and characterization of multi-color sensor circuit
M Assaad, I Yohannes
IEICE Electronics Express 8 (24), 2093-2099, 2011
62011
20 Gb/s referenceless quarter-rate PLL-based clock data recovery circuit in 130 nm CMOS technology
M Assaad, DRS Cumming
2008 15th International Conference on Mixed Design of Integrated Circuits …, 2008
62008
Investigation on vision system: Digital FPGA implementation in case of retina rod cells
M Ghanbarpour, S Haghiri, F Hazzazi, M Assaad, MA Chaudhary, ...
IEEE Transactions on Biomedical Circuits and Systems, 2023
52023
Microstrip lowpass-bandpass triplexer with flat channels and low insertion losses: Design and fabrication for multi-service wireless communication systems
L Nouri, SI Yahya, A Rezaei, F Hazzazi, MA Chaudhary, M Assaad, ...
AEU-International Journal of Electronics and Communications 170, 154807, 2023
52023
Nondestructive food quality monitoring using phase information in time-resolved reflectance spectroscopy
M Sarkar, N Gupta, M Assaad
IEEE Transactions on Instrumentation and Measurement 69 (10), 7787-7795, 2020
52020
Magnetic Resonance-based Wireless Power Transfer for Implantable Biomedical Microelectronics Devices
M Yuan, J Zhao, R Das, R Ghannam, QH Abbasi, M Assaad, H Heidari
2019 IEEE International Symposium on Signal Processing and Information …, 2019
52019
Design and FPGA implementation of PLL-based quarter-rate clock and data recovery circuit
MH Alser, M Assaad, FA Hussin, I Yohannes
2012 4th International Conference on Intelligent and Advanced Systems …, 2012
52012
Ultra low power CMOS circuits working in subthreshold regime for high temperature and radiation environments
E Boufouss, LA Francis, P Gerard, M Assaad, D Flandre
Additional Papers and Presentations 2011 (HITEN), 000243-000250, 2011
52011
Design and modelling of clock and data recovery integrated circuit in 130 nm cmos technology for 10 gb/s serial data communications
M Assaad
University of Glasgow, 2009
52009
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Articles 1–20