Nobuyuki Sugii
Nobuyuki Sugii
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New High Temperature Superconducting Oxides. (La1−xSrx)2CuO4−δ and (La1−xCax)2CuO4−δ
K Kishio, K Kitazawa, S Kanbe, I Yasuda, N Sugii, H Takagi, S Uchida, ...
Chemistry Letters 16 (2), 429-432, 1987
Insulated-gate field-effect transistor, method of fabricating same, and semiconductor device employing same
N Sugii, K Ohnishi, K Washio
US Patent 6,936,875, 2005
LocalVariability and Scalability in Silicon-on-Thin-BOX (SOTB) CMOS With Small Random-Dopant Fluctuation
N Sugii, R Tsuchiya, T Ishigaki, Y Morita, H Yoshimoto, S Kimura
IEEE Transactions on Electron Devices 57 (4), 835-845, 2010
Performance enhancement of strained-Si MOSFETs fabricated on a chemical-mechanical-polished SiGe substrate
N Sugii, D Hisamoto, K Washio, N Yokoyama, S Kimura
IEEE Transactions on Electron Devices 49 (12), 2237-2243, 2002
Multi-layered MoS2 film formed by high-temperature sputtering for enhancement-mode nMOSFETs
T Ohashi, K Suda, S Ishihara, N Sawamoto, S Yamaguchi, K Matsuura, ...
Japanese Journal of Applied Physics 54 (4S), 04DN08, 2015
Impact of parameter variations and random dopant fluctuations on short-channel fully depleted SOI MOSFETs with extremely thin BOX
T Ohtou, N Sugii, T Hiramoto
IEEE electron device letters 28 (8), 740-742, 2007
Semiconductor device, semiconductor circuit module and manufacturing method of the same
K Oda, N Sugii, M Miura, I Suzumura, K Washio
US Patent 7,095,043, 2006
Method of producing semiconductor device and semiconductor substrate
N Sugii, S Yamaguchi, K Washio
US Patent 6,723,541, 2004
Smallest Vth variability achieved by intrinsic silicon on thin BOX (SOTB) CMOS with single metal gate
Y Morita, R Tsuchiya, T Ishigaki, N Sugii, T Iwamatsu, T Ipposhi, H Oda, ...
2008 Symposium on VLSI Technology, 166-167, 2008
Solid-phase crystallization of Si1− xGex alloy layers
S Yamaguchi, N Sugii, SK Park, K Nakagawa, M Miyao
Journal of Applied Physics 89 (4), 2091-2095, 2001
Electro-luminescence from ultra-thin silicon
S Saito, D Hisamoto, H Shimizu, H Hamamura, R Tsuchiya, Y Matsui, ...
Japanese journal of applied physics 45 (7L), L679, 2006
Role of buffer layer on mobility enhancement in a strained-Si -channel metal–oxide–semiconductor field-effect transistor
N Sugii, K Nakagawa, S Yamaguchi, M Miyao
Applied physics letters 75 (19), 2948-2950, 1999
Thermal stability of the strained- heterostructure
N Sugii
Journal of Applied Physics 89 (11), 6459-6463, 2001
Origin of flat band voltage shift in HfO2 gate dielectric with La2O3 insertion
K Kakushima, K Okamoto, M Adachi, K Tachi, P Ahmet, K Tsutsui, N Sugii, ...
Solid-State Electronics 52 (9), 1280-1284, 2008
High-Tc Superconducting Oxide Solid Solutions (La1−x(Ba,Sr,Ca)x)2CuO4−δ
K Kishio, K Kitazawa, N Sugii, S Kanbe, K Fueki, H Takagi, S Tanaka
Chemistry Letters 16 (4), 635-638, 1987
Interface and electrical properties of La-silicate for direct contact of high-k with silicon
K Kakushima, K Tachi, M Adachi, K Okamoto, S Sato, J Song, ...
Solid-state electronics 54 (7), 715-719, 2010
Ultralow-voltage operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM down to 0.37 V utilizing adaptive back bias
Y Yamamoto, H Makiyama, H Shinohara, T Iwamatsu, H Oda, ...
2013 Symposium on VLSI Circuits, T212-T213, 2013
Silicon light-emitting transistor for on-chip optical interconnection
S Saito, D Hisamoto, H Shimizu, H Hamamura, R Tsuchiya, Y Matsui, ...
Applied Physics Letters 89 (16), 2006
Comprehensive study on Vth variability in silicon on thin BOX (SOTB) CMOS with small random-dopant fluctuation: Finding a way to further reduce variation
N Sugii, R Tsuchiya, T Ishigaki, Y Morita, H Yoshimoto, K Torii, S Kimura
2008 IEEE International Electron Devices Meeting, 1-4, 2008
Effects of low temperature annealing on the ultrathin La2O3 gate dielectric; comparison of post deposition annealing and post metallization annealing
JA Ng, Y Kuroki, N Sugii, K Kakushima, SI Ohmi, K Tsutsui, T Hattori, ...
Microelectronic Engineering 80, 206-209, 2005
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