Novel design for a memristor-based full adder using a new IMPLY logic approach A Karimi, A Rezai Journal of Computational Electronics 17 (3), 1303-1314, 2018 | 37 | 2018 |
A novel design for ultra-low power pulse-triggered D-Flip-Flop with optimized leakage power A Karimi, A Rezai, MM Hajhashemkhani Integration, the VLSI Journal 60 (1), 160-166, 2017 | 32 | 2017 |
A design methodology to optimize the device performance in CNTFET A Karimi, A Rezai ECS Journal of Solid State Science and Technology 6 (8), M97, 2017 | 32 | 2017 |
Ultra-low power pulse-triggered CNTFET-based flip-flop A Karimi, A Rezai, MM Hajhashemkhani IEEE Transactions on Nanotechnology 18, 756-761, 2019 | 26 | 2019 |
Improved device performance in CNTFET using genetic algorithm A Karimi, A Rezai ECS Journal of Solid State Science and Technology 6 (1), M9, 2016 | 23 | 2016 |
High‐performance digital logic implementation approach using novel Memristor‐based multiplexer A Karimi, A Rezai International Journal of Circuit Theory and Applications 47 (12), 1933-1947, 2019 | 9 | 2019 |
Novel design for Memristor‐based n to 1 multiplexer using new IMPLY logic approach A Karimi, A Rezai IET Circuits, Devices & Systems 13 (5), 647-655, 2019 | 9 | 2019 |
Design of Novel Low-Power and High-Efficiency Class-D Audio Amplifier MM Hajhashemkhani, A Rezai, A Karimi International Journal of Control and Automation 10 (3), 53-64, 2017 | | 2017 |