Simultaneous branch and warp interweaving for sustained GPU performance N Brunie, S Collange, G Diamos Proceedings of the 39th International Symposium on Computer Architecture, 49-60, 2012 | 139 | 2012 |

Arithmetic core generation using bit heaps N Brunie, F de Dinechin, M Istoan, G Sergent, K Illyes, B Popa Field Programmable Logic and Applications (FPL), 2013 23rd International …, 2013 | 59 | 2013 |

Execution efficiency in a single-program, multiple-data processor S Collange, N Brunie US Patent App. 13/707,301, 2014 | 52 | 2014 |

Code generators for mathematical functions N Brunie, F De Dinechin, O Kupriianova, C Lauter 2015 IEEE 22nd Symposium on Computer Arithmetic, 66-73, 2015 | 38 | 2015 |

Modified fused multiply and add for exact low precision product accumulation N Brunie 2017 IEEE 24th Symposium on Computer Arithmetic (ARITH), 106-113, 2017 | 37 | 2017 |

A mixed-precision fused multiply and add N Brunie, F De Dinechin, B De Dinechin 2011 Conference Record of the Forty Fifth Asilomar Conference on Signals …, 2011 | 32 | 2011 |

Computing floating-point logarithms with fixed-point operations J Le Maire, N Brunie, F De Dinechin, JM Muller 2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 156-163, 2016 | 27 | 2016 |

Contributions to computer arithmetic and applications to embedded systems N Brunie Ecole normale supérieure de lyon-ENS LYON, 2014 | 10 | 2014 |

evre, G. Melquiond, N. Revol, and S. Torres, Handbook of Floating-Point Arithmetic JM Muller, N Brunie, F De Dinechin, CP Jeannerod, M Joldes, V Lef Springer, New York, 2018 | 8 | 2018 |

Hardware implementation of floating-point arithmetic JM Muller, N Brunie, F de Dinechin, CP Jeannerod, M Joldes, V Lefèvre, ... Handbook of Floating-Point Arithmetic, 267-320, 2018 | 8 | 2018 |

Floating point dot-product operator with correct rounding N Brunie US Patent 11,294,627, 2022 | 7 | 2022 |

Deep learning inference on the mppa3 manycore processor BD de Dinechin, J Hascoët, JL Maire, N Brunie Embedded World Confernce 2020 (to appear, 2020 | 6 | 2020 |

Virtual prototyping of floating point units G Sarrazin, N Brunie, F Pétrot Proceedings of the 2016 Workshop on Rapid Simulation and Performance …, 2016 | 6 | 2016 |

Software implementation of floating-point arithmetic JM Muller, N Brunie, F de Dinechin, CP Jeannerod, M Joldes, V Lefèvre, ... Handbook of Floating-Point Arithmetic, 321-374, 2018 | 5 | 2018 |

Apparatus and method for combining thread warps with compatible execution masks for simultaneous execution and increased lane utilization N Brunie, S Collange US Patent 9,851,977, 2017 | 4 | 2017 |

Blockwise matrix multiplication system BD De Dinechin, J Le Maire, N Brunie US Patent 11,169,808, 2021 | 3 | 2021 |

Towards the basic linear algebra unit: replicating multi-dimensional FPUs to accelerate linear algebra applications N Brunie 2020 54th Asilomar Conference on Signals, Systems, and Computers, 1283-1290, 2020 | 3 | 2020 |

Precision adaptation for fast and accurate polynomial evaluation generation N Brunie, C Lauter, G Revy 2019 IEEE 30th International Conference on Application-specific Systems …, 2019 | 3 | 2019 |

Meta-implementation of vectorized logarithm function in binary floating-point arithmetic H de Lassus Saint-Geniès, N Brunie, G Revy 2018 IEEE 29th International Conference on Application-specific Systems …, 2018 | 2 | 2018 |

Definitions and basic notions JM Muller, N Brunie, F de Dinechin, CP Jeannerod, M Joldes, V Lefèvre, ... Handbook of Floating-Point Arithmetic, 15-45, 2018 | 2* | 2018 |