| Formal equivalence checking and design debugging SY Huang, KTT Cheng Springer Science & Business Media, 2012 | 230 | 2012 |
| High-performance SIFT hardware accelerator for real-time image feature extraction FC Huang, SY Huang, JW Ker, YC Chen IEEE Transactions on Circuits and Systems for Video Technology 22 (3), 340-351, 2011 | 203 | 2011 |
| PPN based 10T SRAM cell for low-leakage and resilient subthreshold operation CH Lo, SY Huang IEEE Journal of Solid-State Circuits 46 (3), 695-704, 2011 | 182 | 2011 |
| Fault emulation: A new methodology for fault grading KT Cheng, SY Huang, WJ Dai IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1999 | 143 | 1999 |
| Performance characterization of TSV in 3D IC via sensitivity analysis JW You, SY Huang, DM Kwai, YF Chou, CW Wu 2010 19th IEEE Asian Test Symposium, 389-394, 2010 | 79 | 2010 |
| Quick scan chain diagnosis using signal profiling JS Yang, SY Huang | 77* | |
| Oscillation-based prebond TSV test LR Huang, SY Huang, S Sunter, KH Tsai, WT Cheng IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 76 | 2013 |
| Small delay testing for TSVs in 3-D ICs SY Huang, YH Lin, KH Tsai, WT Cheng, S Sunter, YF Chou, DM Kwai Proceedings of the 49th Annual Design Automation Conference, 1031-1036, 2012 | 73 | 2012 |
| On improving the accuracy of multiple defect diagnosis SY Huang Proceedings 19th IEEE VLSI Test Symposium. VTS 2001, 34-39, 2001 | 63 | 2001 |
| AQUILA: An equivalence checking system for large sequential designs SY Huang, KT Cheng, KC Chen, CY Huang, F Brewer IEEE Transactions on Computers 49 (5), 443-464, 2000 | 63 | 2000 |
| ErrorTracer: A fault simulation-based approach to design error diagnosis SY Huang, KT Cheng, KC Chen, DI Cheng Proceedings International Test Conference 1997, 974-981, 1997 | 61 | 1997 |
| A low-jitter ADPLL via a suppressive digital filter and an interpolation-based locking scheme HJ Hsu, SY Huang IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (1), 165-170, 2009 | 52 | 2009 |
| Fault emulation: a new approach to fault grading KT Cheng, SY Huang, WJ Dai Proceedings of IEEE International Conference on Computer Aided Design (ICCAD …, 1995 | 46 | 1995 |
| Error correction based on verification techniques SY Huang, KC Chen, KT Cheng Proceedings of the 33rd annual Design Automation Conference, 258-261, 1996 | 44 | 1996 |
| Parameterized all-digital PLL architecture and its compiler to support easy process migration CW Tzeng, SY Huang, PY Chao IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (3), 621-630, 2013 | 43 | 2013 |
| AQUILA: An equivalence verifier for large sequential circuits SY Huang, KT Cheng, KC Chen Proceedings of ASP-DAC'97: Asia and South Pacific Design Automation …, 1997 | 43 | 1997 |
| Diagnosis of Byzantine open-segment faults SY Huang | 43* | |
| Errortracer: Design error diagnosis based on fault simulation techniques SY Huang, KT Cheng IEEE transactions on computer-aided design of integrated circuits and …, 1999 | 42 | 1999 |
| Parametric delay test of post-bond through-silicon vias in 3-D ICs via variable output thresholding analysis YH Lin, SY Huang, KH Tsai, WT Cheng, S Sunter, YF Chou, DM Kwai IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 41 | 2013 |
| QC-fill: Quick-and-cool X-filling for multicasting-based scan test CW Tzeng, SY Huang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009 | 41 | 2009 |
Kwang-Ting (Tim) ChengChair Professor of ECE and CSE, HKUSTVerified email at ust.hk
