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Dimitri Lederer
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New substrate passivation method dedicated to HR SOI wafer fabrication with increased substrate resistivity
D Lederer, JP Raskin
IEEE Electron Device Letters 26 (11), 805-807, 2005
2902005
Plant functional type classification for earth system models: results from the European Space Agency's Land Cover Climate Change Initiative
B Poulter, N MacBean, A Hartley, I Khlystova, O Arino, R Betts, ...
Geoscientific Model Development 8 (7), 2315-2328, 2015
248*2015
Substrate loss mechanisms for microstrip and CPW transmission lines on lossy silicon wafers
D Lederer, JP Raskin
Solid-State Electronics 47 (11), 1927-1936, 2003
1642003
Analog/RF performance of multiple gate SOI devices: wideband simulations and characterization
JP Raskin, TM Chung, V Kilchytska, D Lederer, D Flandre
IEEE Transactions on Electron Devices 53 (5), 1088-1095, 2006
1372006
What are the limiting parameters of deep-submicron MOSFETs for high frequency applications?
G Dambrine, C Raynaud, D Lederer, M Dehan, O Rozeaux, ...
IEEE Electron Device Letters 24 (3), 189-191, 2003
1322003
Effective resistivity of fully-processed SOI substrates
D Lederer, JP Raskin
Solid-State Electronics 49 (3), 491-496, 2005
1292005
FinFET analogue characterization from DC to 110 GHz
D Lederer, V Kilchytska, T Rudenko, N Collaert, D Flandre, A Dixit, ...
Solid-State Electronics 49 (9), 1488-1496, 2005
1262005
Method of manufacturing a multilayer semiconductor structure with reduced ohmic losses
D Lederer
US Patent App. 10/572,799, 2007
1242007
RF performance of a commercial SOI technology transferred onto a passivated HR silicon substrate
D Lederer, JP Raskin
IEEE Transactions on Electron Devices 55 (7), 1664-1671, 2008
862008
Enhanced high resistivity SOI wafers for RF applications
D Lederer, R Lobet, JP Raskin
2004 IEEE International SOI Conference (IEEE Cat. No. 04CH37573), 46-47, 2004
862004
Dependence of FinFET RF performance on fin width
D Lederer, B Parvais, A Mercha, N Collaert, M Jurczak, JP Raskin, ...
Digest of Papers. 2006 Topical Meeting on Silicon Monolithic Integrated …, 2006
782006
Performance of SOI devices transferred onto passivated HR SOI substrates using a layer transfer technique
D Lederer, B Aspar, C Laghae-Blanchard, JP Raskin
2006 IEEE International SOI Conferencee Proceedings, 29-30, 2006
722006
Perspective of FinFETs for analog applications
V Kilchytska, N Collaert, R Rooyackers, D Lederer, JP Raskin, D Flandre
Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat …, 2004
692004
Floating effective back-gate effect on the small-signal output conductance of SOI MOSFETs
V Kilchytska, D Levacq, D Lederer, JP Raskin, D Flandre
IEEE Electron Device Letters 24 (6), 414-416, 2003
542003
High-frequency noise performance of 60-nm gate-length FinFETs
JP Raskin, G Pailloncy, D Lederer, F Danneville, G Dambrine, ...
IEEE transactions on electron devices 55 (10), 2718-2727, 2008
522008
Sensitivity of trigate MOSFETs to random dopant induced threshold voltage fluctuations
R Yan, D Lynch, T Cayron, D Lederer, A Afzalian, CW Lee, N Dehdashti, ...
Solid-State Electronics 52 (12), 1872-1876, 2008
412008
Impact of Si substrate resistivity on the non-linear behaviour of RF CPW transmission lines
CR Neve, D Lederer, G Pailloncy, DC Kerr, JM Gering, TG McKay, ...
2008 European Microwave Integrated Circuit Conference, 36-39, 2008
332008
Accurate effective mobility extraction by split CV technique in SOI MOSFETs: Suppression of the influence of floating-body effects
V Kilchytska, D Lederer, N Collaert, JP Raskin, D Flandre
IEEE electron device letters 26 (10), 749-751, 2005
312005
Process for manufacturing a multilayer structure made from semiconducting materials
JP Raskin, D Lederer, F Brunier
US Patent 7,585,748, 2009
302009
Properties of accumulation-mode multi-gate field-effect transistors
JP Colinge, D Lederer, A Afzalian, R Yan, CW Lee, ND Akhavan, W Xiong
Japanese journal of applied physics 48 (3R), 034502, 2009
282009
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