Sunil Khatri
Title
Cited by
Cited by
Year
VIS: A system for verification and synthesis
RK Brayton, GD Hachtel, A Sangiovanni-Vincentelli, F Somenzi, A Aziz, ...
International conference on computer aided verification, 428-432, 1996
9151996
Analysis and avoidance of cross-talk in on-chip buses
C Duan, A Tirumala, SP Khatri
HOT 9 Interconnects. Symposium on High Performance Interconnects, 133-138, 2001
1842001
A novel VLSI layout fabric for deep sub-micron applications
SP Khatri, A Mehrotra, RK Brayton, A Sangiovanni-Vincentelli, ...
Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361), 491-496, 1999
1261999
Towards acceleration of fault simulation using graphics processing units
K Gulati, SP Khatri
Proceedings of the 45th annual Design Automation Conference, 822-827, 2008
1232008
Efficient on-chip crosstalk avoidance CODEC design
C Duan, VHC Calle, SP Khatri
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17 (4), 551-560, 2009
1102009
A fast hardware approach for approximate, efficient logarithm and antilogarithm computations
S Paul, N Jayakumar, SP Khatri
IEEE transactions on very large scale integration (vlsi) systems 17 (2), 269-277, 2008
922008
Fast circuit simulation on graphics processing units
K Gulati, JF Croix, SP Khatri, R Shastry
2009 Asia and South Pacific Design Automation Conference, 403-408, 2009
902009
Cross-talk immune VLSI design using a network of PLAs embedded in a regular layout fabric
SP Khatri, RK Brayton, A Sangiovanni-Vincentelli
IEEE/ACM International Conference on Computer Aided Design. ICCAD-2000. IEEE …, 2000
812000
Multi-valued logic synthesis
RK Brayton, SP Khatri
Proceedings Twelfth International Conference on VLSI Design.(Cat. No …, 1999
781999
A design approach for radiation-hard digital electronics
R Garg, N Jayakumar, SP Khatri, G Choi
Proceedings of the 43rd annual Design Automation Conference, 773-778, 2006
702006
Accelerating statistical static timing analysis using graphics processing units
K Gulati, SP Khatri
2009 Asia and South Pacific Design Automation Conference, 260-265, 2009
652009
A DCVSL delay cell for fast low power frequency synthesis applications
DZ Turker, SP Khatri, E Sánchez-Sinencio
IEEE Transactions on Circuits and Systems I: Regular Papers 58 (6), 1225-1238, 2011
642011
Practical techniques to reduce skew and its variations in buffered clock networks
G Venkataraman, N Jayakumar, J Hu, P Li, S Khatri, A Rajaram, ...
ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005 …, 2005
642005
A novel clock distribution and dynamic de-skewing methodology
A Kapoor, N Jayakumar, SP Khatri
IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004 …, 2004
582004
Exploiting crosstalk to speed up on-chip buses
C Duan, SP Khatri
Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004
582004
Clock distribution scheme using coplanar transmission lines
VH Cordero, SP Khatri
Proceedings of the conference on Design, automation and test in Europe, 985-990, 2008
562008
Addressing the timing closure problem by integrating logic optimization and placement
W Gosti, SR Khatri, AL Sangiovanni-Vincentelli
IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE …, 2001
522001
Datapath design methodology and routing apparatus
S Das, SP Khatri
US Patent 6,598,215, 2003
502003
Vis
RK Brayton, GD Hachtel, A Sangiovanni-Vincentelli, F Somenzi, A Aziz, ...
International Conference on Formal Methods in Computer-Aided Design, 248-256, 1996
481996
A metal and via maskset programmable VLSI design methodology using PLAs
N Jayakumar, SP Khatri
IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004 …, 2004
452004
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