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Mohd Azizi Chik
Mohd Azizi Chik
SilTerra Malaysia , INEE Unimap
Verified email at silterra.com
Title
Cited by
Cited by
Year
Fundamental simulation studies of CONWIP in front-end wafer fabrication
NA Muhammad, JF Chin, S Kamarrudin, MA Chik, J Prakash
Journal of Industrial and Production Engineering 32 (4), 232-246, 2015
192015
Discrete event simulation modeling for semiconductor fabrication operation
MA Chik, AB Rahim, AZM Rejab, K Ibrahim, U Hashim
2014 IEEE International Conference on Semiconductor Electronics (ICSE2014 …, 2014
162014
Automated manufacturing systems and methods
MA Chik, TT Ung, T Krisnamuthi, KW Lim, LH Lim, B Lee
US Patent 7,672,748, 2010
142010
Horrendous capacity cost of semiconductor wafer manufacturing
K Ibrahim, MA Chik, U Hashim
2014 IEEE International Conference on Semiconductor Electronics (ICSE2014 …, 2014
132014
Development of capacity indices for semiconductor fabrication
MA Chik, K Ibrahim, MH Saidin, FM Yusof, G Devandran, U Hashim
Semiconductor Electronics (ICSE), 2012 10th IEEE International Conference on …, 2012
132012
Efficient lot batching system for furnace operation
K Ibrahim, MA Chik, WS Nizam, NL Fern, NF Za'bah
Advanced Semiconductor Manufacturing Conference and Workshop, 2003 IEEEI …, 2003
132003
Technique to improve visibility for cycle time improvement in semiconductor manufacturing
SRA Rahim, I Ahmad, MA Chik
Semiconductor Electronics (ICSE), 2012 10th IEEE International Conference on …, 2012
102012
Methods and apparatus for white space reduction in a production facility
T Krisnamuthi, MA Chik, TT Ung, KW Lim, ST Markle
US Patent 8,160,736, 2012
102012
SilTera dispatching systems through theory of constraint
MA Chik, YE Teck, LK Wee
ICONIP'02. Proceedings of the 9th International Conference on Neural …, 2002
102002
Throughput improvement in semiconductor fabrication for 0.13 μm technology
P Balakrishna, MA Chik, I Ahmad, B Mohamad
2011 IEEE Regional Symposium on Micro and Nano Electronics, 228-231, 2011
92011
A study for optimum productivity yield in 0.16 µm mixed of wafer fabrication facility
MA Chik, VC Yung, P Balakrishna, U Hashim, I Ahmad, B Mohamad
2010 IEEE International Conference on Semiconductor Electronics (ICSE2010 …, 2010
92010
Managing demand variabiliy to achieve optimum cost and revenue in wafer foundry
K Ibrahim, MA Chik, U Hashim
11th Asia Pacific Industrial Engineering & Management Systems Conference, 2010
82010
Weighted grey relational analysis to evaluate multilevel dispatching rules in wafer fabrication
GC Yee, CJ Feng, MAB Chik, M Mokhtar
Grey Systems: Theory and Application 11 (4), 619-649, 2021
72021
Industrial engineering roles in semiconductor fabrication
MA Chik, MH Saidin, U Hashim
11th Asia Pacific Industrial Engineering & Management Systems Conference, 2010
72010
A simulation approach for dispatching techniques comparison in 200mm wafer foundry
MA Chik, I Ahmad, MY Jamaluddin
2004 IEEE International Conference on Semiconductor Electronics, 5 pp., 2004
62004
Variability due to tool configurations that impacts overall capacity in wafer fabrication facility
K Ibrahim, MA Chik, U Hashim
The 11th Asia Pacific Industrial Engineering and Management Systems …, 2010
52010
Development of Manufacturing Simulation Model for Semiconductor Fabrication
SR Ab Rahim, I Ahmad, MA Chik, AZM Rejab, U Hashim
International Journal of Computer and Systems Engineering 7 (2), 202-206, 2013
32013
Semiconductor Fabrication Strategy for Cycle Time and Capacity Optimization: Past and Present
K Ibrahim, MA Chik, U Hashim
Proceedings of the 2016 International Conference on Industrial Engineering …, 2016
22016
An alternative approach to measures the application of dispatching rule in the wafer foundry
MA Chik, I Ahmad, MY Jamaluddin
2004 IEEE International Conference on Semiconductor Electronics, 3 pp., 2004
22004
Comprehensive Sequencing Dispatching Method for Identified Bottleneck Tool–Photolithography Process
MA Chik, Y EngTeck, MA AbdMalek, M HafidzSaidi
NSM, Perlis, Malaysia, 19-21, 2003
22003
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