Static noise margin analysis of SRAM cell for high speed application D Mukherjee, HK Mondal, BVR Reddy International Journal of Computer Science Issues (IJCSI) 7 (5), 175, 2010 | 93 | 2010 |
Leakage Current reduction in 6T single cell SRAM at 90nm technology S Birla, NK Shukla, D Mukherjee, RK Singh 2010 International Conference on Advances in Computer Engineering, 292-294, 2010 | 28 | 2010 |
Design and development of a novel MOSFET structure for reduction of reverse bias pn junction leakage current D Mukherjee, BVR Reddy International Journal of Intelligence and Sustainable Computing 1 (1), 32-43, 2020 | 20 | 2020 |
Leakage current minimization in deep-submicron conventional single cell SRAM NK Shukla, D Mukherjee, S Birla, RK Singh 2010 International Conference on Recent Trends in Information …, 2010 | 16 | 2010 |
U shaped vertical gate bulk MOSFET for area minimization D Mukherjee, BV Ramana Reddy Journal of Information and Optimization Sciences 39 (1), 369-375, 2018 | 6 | 2018 |
A novel method for reduction of leakage current in MOSFET D Mukherjee, BVR Reddy International Journal of Convergence Computing 3 (1), 48-61, 2018 | 6 | 2018 |
Implementation of ARINC 429 16 channel transmitter controller on FPGA D Mukherjee, N Kumar, K Singh, H Mondal, BVR Reddy International Conference on Advances in Information Technology and Mobile …, 2011 | 6 | 2011 |
Video manifold feature extraction based on ISOMAP S Menaria, D Mukherjee Int. J. Eng. Sci. Invention 4 (4), 64-67, 2015 | 5 | 2015 |
Manifold feature extraction of video based on ISOMAP S Menaria, IG Iyappan, D Mukherjee International Journal of Engineering Science and Technology 7 (4), 169, 2015 | 5 | 2015 |
Analysis and Simulation of a Low Leakage Conventional SRAM Memory Cell at Deep Sub-Micron Level D Mukherjee, S Birla, NK Shukla, RK Singh, A Singhi, H Sharma International Conference on Control, Communication & Computing (ICCC 2010 …, 2010 | 5 | 2010 |
Effect of MOSFET p-n Junction Length on Leakage Current D Mukherjee, BVR Reddy Far East Journal of Electronics and Communications, 101-113, 2016 | 4 | 2016 |
Leakage process and minimization-transistor stacking effect, data retention gated ground cache, drowsy cache D Mukherjee, BVR Reddy Advanced Materials Research 403, 4287-4294, 2012 | 4 | 2012 |
Comparison of three techniques for leakage current minimization in CMOS VLSI Circuit in 90 nm technology D Mukherjee, BVR Reddy, G Perveen, N Kumar, A Noor Int J Recent Trends Eng Technol 4, 162-166, 2010 | 4 | 2010 |
Information realization with statistical predictive inferences and coding form D Mukherjee, P Chakrabarti, A Khanna, V Gupta International Journal of Computer Science and Information Security 8 (6 …, 2010 | 4 | 2010 |
A simulation based approach to show various factors affecting the GIDL in MATLAB D Mukherjee, PK Tripathi, BVR Reddy Int J Eng Sci Technol 2, 5534-5548, 2010 | 4 | 2010 |
RF-SiP: Emerging Technology in Chip-Integration D Mukherjee, NK Shukla, D Gautam, S Birla, BVR Reddy, G Bhardwaj, ... 1st International Conference on Emerging Trends in Signal Processing and …, 2010 | 3 | 2010 |
Algorithm design, software simulation and mathematical modelling of subthreshold leakage current in CMOS circuits D Mukherjee, BVR Reddy International Journal of Computational Complexity and Intelligent Algorithms …, 2019 | 2 | 2019 |
Design and Investigation of Split Gate Dielectric Modulated JLFET for Detection of Biological Molecule Using TCAD Simulation R Mandal, D Mukherjee Silicon 15 (3), 1171-1179, 2023 | 1 | 2023 |
Design of cost effective transistor by software simulation for profitable production D Mukherjee, BVR Reddy International Journal of Intelligent Enterprise 7 (1-3), 291-305, 2020 | 1 | 2020 |
INVESTIGATION OF MOTION, DENSITY AND RELATED PARAMETERS OF SENSOR MOBILE NODE IN IONOSPHERE A GHOSH, P CHAKRABARTI, D MUKHERJEE IN Patent App. 2329/DEL/2,010, 2012 | | 2012 |