| High-Speed VLSI Architectures for Modular Polynomial Multiplication via Fast Filtering and Applications to Lattice-Based Cryptography W Tan, A Wang, Y Lao, X Zhang, KK Parhi IEEE Transactions on Computers, 2023 | 19* | 2023 |
| NoPUF: A novel PUF design framework toward modeling attack resistant PUFs A Wang, W Tan, Y Wen, Y Lao IEEE Transactions on Circuits and Systems I: Regular Papers 68 (6), 2508-2521, 2021 | 17 | 2021 |
| High-speed modular multiplier for lattice-based cryptosystems W Tan, BM Case, A Wang, S Gao, Y Lao IEEE Transactions on Circuits and Systems II: Express Briefs 68 (8), 2927-2931, 2021 | 17 | 2021 |
| An ultra-highly parallel polynomial multiplier for the bootstrapping algorithm in a fully homomorphic encryption scheme W Tan, BM Case, G Hu, S Gao, Y Lao Journal of Signal Processing Systems 93, 643-656, 2021 | 12 | 2021 |
| Pipelined high-throughput NTT architecture for lattice-based cryptography W Tan, A Wang, Y Lao, X Zhang, KK Parhi 2021 Asian Hardware Oriented Security and Trust Symposium (AsianHOST), 1-4, 2021 | 9 | 2021 |
| An efficient polynomial multiplier architecture for the bootstrapping algorithm in a fully homomorphic encryption scheme W Tan, A Au, B Aase, S Aao, Y Lao 2019 IEEE International workshop on signal processing systems (SiPS), 85-90, 2019 | 8 | 2019 |
| PaReNTT: Low-Latency Parallel Residue Number System and NTT-Based Long Polynomial Modular Multiplication for Homomorphic Encryption W Tan, SW Chiu, A Wang, Y Lao, KK Parhi IEEE Transactions on Information Forensics and Security, 2023 | 5 | 2023 |
| Area-efficient pipelined vlsi architecture for polar decoder W Tan, A Wang, Y Xu, Y Lao 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 352-357, 2020 | 5 | 2020 |
| Analysis of Dead Reckoning Accuracy in Swarm Robotics System W Tan, T Anglea, Y Wang 2018 13th World Congress on Intelligent Control and Automation (WCICA), 860-864, 2018 | 3 | 2018 |
| Low-latency polynomial modulo multiplication over ring KK Parhi, X Zhang, W Tan, A Wang, Y Lao US Patent App. 17/582,560, 2023 | 1 | 2023 |
| Integral Sampler and Polynomial Multiplication Architecture for Lattice-based Cryptography A Wang, W Tan, KK Parhi, Y Lao 2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2022 | 1 | 2022 |
| VLSI Architecture for Polar Codes Using Fast Fourier Transform-like Design W Tan Clemson University, 2020 | 1 | 2020 |
| KyberMat: Efficient Accelerator for Matrix-Vector Polynomial Multiplication in CRYSTALS-Kyber Scheme via NTT and Polyphase Decomposition W Tan, Y Lao, KK Parhi 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2023 | | 2023 |
| NNTesting: Neural Network Fault Attacks Detection Using Gradient-Based Test Vector Generation A Wang, B Zhao, W Tan, Y Lao 2023 60th ACM/IEEE Design Automation Conference (DAC), 1-6, 2023 | | 2023 |
| High-Performance VLSI Architectures for Lattice-Based Cryptography W Tan | | 2022 |
Yingjie LaoTufts UniversityVerified email at tufts.edu
