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Nastaran Hajinazar
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SIMDRAM: A framework for bit-serial SIMD processing using DRAM
N Hajinazar, GF Oliveira, S Gregorio, JD Ferreira, NM Ghiasi, M Patel, ...
Proceedings of the 26th ACM International Conference on Architectural …, 2021
1272021
CoNDA: Efficient cache coherence support for near-data accelerators
A Boroumand, S Ghose, M Patel, H Hassan, B Lucia, R Ausavarungnirun, ...
Proceedings of the 46th International Symposium on Computer Architecture …, 2019
1202019
Demystifying complex workload-DRAM interactions: An experimental study
S Ghose, T Li, N Hajinazar, DS Cali, O Mutlu
Proceedings of the ACM on Measurement and Analysis of Computing Systems 3 (3 …, 2019
902019
A case for richer cross-layer abstractions: Bridging the semantic gap with expressive memory
N Vijaykumar, A Jain, D Majumdar, K Hsieh, G Pekhimenko, E Ebrahimi, ...
2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018
502018
Casper: Accelerating Stencil Computations Using Near-Cache Processing
A Denzler, GF Oliveira, N Hajinazar, R Bera, G Singh, J Gómez-Luna, ...
IEEE Access 11, 22136-22154, 2023
302023
The Virtual Block Interface: A Flexible Alternative to the Conventional Virtual Memory Framework
N Hajinazar, P Patel, M Patel, K Kanellopoulos, S Ghose, ...
2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture …, 2020
292020
Sibyl: Adaptive and extensible data placement in hybrid storage systems using online reinforcement learning
G Singh, R Nadig, J Park, R Bera, N Hajinazar, D Novo, J Gómez-Luna, ...
Proceedings of the 49th Annual International Symposium on Computer …, 2022
242022
LazyPIM: Efficient support for cache coherence in processing-in-memory architectures
A Boroumand, S Ghose, M Patel, H Hassan, B Lucia, N Hajinazar, ...
arXiv preprint arXiv:1706.03162, 2017
212017
AirLift: a fast and comprehensive technique for remapping alignments between reference genomes
JS Kim, C Firtina, MB Cavlak, DS Cali, M Alser, N Hajinazar, C Alkan, ...
arXiv preprint arXiv:1912.08735, 2019
182019
Understanding the interactions of workloads and DRAM types: A comprehensive experimental study
S Ghose, T Li, N Hajinazar, DS Cali, O Mutlu
arXiv preprint arXiv:1902.07609, 2019
112019
SIMDRAM: An end-to-end framework for bit-serial SIMD computing in DRAM
N Hajinazar, GF Oliveira, S Gregorio, J Ferreira, NM Ghiasi, M Patel, ...
arXiv preprint arXiv:2105.12839, 2021
102021
CoNDA: Enabling efficient near-data accelerator communication by optimizing data movement
A Boroumand, S Ghose, M Patel, R Ausavarungnirun, H Hassan, B Lucia, ...
Proc. ISCA, 2019
62019
A case for richer cross-layer abstractions: Bridging the semantic gap with expressive memory. In 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA)
N Vijaykumar, A Jain, D Majumdar, K Hsieh, G Pekhimenko, E Ebrahimi, ...
IEEE, 2018
52018
ALP: Alleviating CPU-memory data movement overheads in memory-centric systems
NM Ghiasi, N Vijaykumar, GF Oliveira, L Orosa, I Fernandez, ...
IEEE Transactions on Emerging Topics in Computing, 2022
42022
Utopia: Fast and Efficient Address Translation via Hybrid Restrictive & Flexible Virtual-to-Physical Address Mappings
K Kanellopoulos, R Bera, K Stojiljkovic, FN Bostanci, C Firtina, ...
Proceedings of the 56th Annual IEEE/ACM International Symposium on …, 2023
22023
Data-Centric and Data-Aware Frameworks for Fundamentally Efficient Data Handling in Modern Computing Systems
N Hajinazar
arXiv preprint arXiv:2109.05881, 2021
12021
The Virtual Block Interface
N Hajinazar
SIMDRAM: A Framework for Bit-Serial SIMD Processing Using DRAM Extended Abstract
N Hajinazar, GF Oliveira, S Gregorio, JD Ferreira, NM Ghiasi, M Patel, ...
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