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Sherif Sharroush
Sherif Sharroush
Faculty of Engineering, Port Said University
Verified email at eng.psu.edu.eg - Homepage
Title
Cited by
Cited by
Year
Analysis of the subthreshold CMOS logic inverter
SM Sharroush
Ain Shams Engineering Journal 9 (4), 1001-1017, 2018
232018
Subthreshold MOSFET transistor amplifier operation
SM Sharroush, YS Abdalla, AA Dessouki, ESA El-Badawy
2009 4th international design and test workshop (IDT), 1-6, 2009
222009
Impact of technology scaling on the performance of domino CMOS logic
SM Sharroush, YS Abdalla, AA Dessouki, ESA El-Badawy
2008 International Conference on Electronic Design, 1-7, 2008
202008
A voltage-controlled ring oscillator based on an FGMOS transistor
SM Sharroush
Microelectronics journal 66, 167-186, 2017
152017
Design of the CMOS inverter‐based amplifier: A quantitative approach
SM Sharroush
International Journal of Circuit Theory and Applications 47 (7), 1006-1036, 2019
142019
Speeding-up wide-fan in domino logic using a controlled strong PMOS keeper
SM Sharroush, YS Abdalla, AA Dessouki, ESA El-Badawy
2008 International Conference on Computer and Communication Engineering, 633-637, 2008
142008
Dynamic random-access memories without sense amplifiers
SM Sharroush, YS Abdalla, AA Dessouki, ESA El-Badawy
e & i Elektrotechnik und Informationstechnik 129 (2), 88-101, 2012
132012
Dynamic random-access memories without sense amplifiers
SM Sharroush, YS Abdalla, AA Dessouki, ESA El-Badawy
e & i Elektrotechnik und Informationstechnik 129 (2), 88-101, 2012
132012
Compensating for the keeper current of CMOS domino logic using a well designed NMOS transistor
SM Sharroush, YS Abdalla, AA Dessouki, ESA El-Badawy
2009 National Radio Science Conference, 1-8, 2009
122009
Design techniques for high performance MOS digital integrated circuits
SM Sharroush
Doctor of Philosophy Thesis, Port Said University, Egypt, 2011
112011
Reading DRAM cells using two properly designed cascaded inverters
SM Sharroush
e & i Elektrotechnik und Informationstechnik 2 (131), 41-52, 2014
82014
A novel low-power and high-speed dynamic CMOS logic circuit technique
SM Sharroush, YS Abdalla, AA Dessouki, ESA El-Badawy
2009 National Radio Science Conference, 1-8, 2009
82009
Performance optimization of MOS current-mode logic
SM Sharroush
2016 International Conference on Electrical, Electronics, and Optimization …, 2016
72016
Parameter extraction and modelling of the MOS transistor by an equivalent resistance
SM Sharroush, YS Abdalla
Mathematical and Computer Modelling of Dynamical Systems 27 (1), 50-86, 2021
62021
A novel variable-gain amplifier based on an FGMOS transistor
SM Sharroush
2016 5th International Conference on Electronic Devices, Systems and …, 2016
62016
A predischarged bitline 1T-1C DRAM readout scheme
SM Sharroush
Microelectronics Journal 83, 168-184, 2019
52019
Understanding the behavior of RTD-loaded NMOS inverter through compact-form analysis
SM Sharroush
Ain Shams Engineering Journal 9 (4), 2453-2478, 2018
52018
Time-domain readout of 1T–1C DRAM cells
SM Sharroush
Journal of Circuits, Systems and Computers 27 (01), 1850005, 2018
52018
Impact of technology scaling on the performance of DRAMs
SM Sharroush
2016 5th International Conference on Electronic Devices, Systems and …, 2016
52016
Optimum sizing of the sleep transistor in MTCMOS technology
SM Sharroush, YS Abdalla
AEU-International Journal of Electronics and Communications 138, 153882, 2021
42021
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