Muhammad Nadzir Marsono
Muhammad Nadzir Marsono
School of Electrical Eng., Faculty of Engineering, Universiti Teknologi Malaysia
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Cited by
Cited by
A comprehensive survey of load balancing techniques in software-defined network
M Hamdan, E Hassan, A Abdelaziz, A Elhigazi, B Mohammed, S Khan, ...
Journal of Network and Computer Applications 174, 102856, 2021
ProNoC: A low latency network-on-chip based many-core system-on-chip prototyping platform
A Monemi, JW Tang, M Palesi, MN Marsono
Microprocessors and Microsystems 54, 60-74, 2017
A hardware architecture of Prewitt edge detection
A Seif, MM Salut, MN Marsono
2010 IEEE conference on sustainable utilization and development iná…, 2010
Biometric encryption based on a fuzzy vault scheme with a fast chaff generation algorithm
M Khalil-Hani, MN Marsono, R Bakhteri
Future Generation Computer Systems 29 (3), 800-810, 2013
Flow-aware elephant flow detection for software-defined networks
M Hamdan, B Mohammed, U Humayun, A Abdelaziz, S Khan, MA Ali, ...
IEEE Access 8, 72585-72597, 2020
Software-defined networks for resource allocation in cloud computing: A survey
A Mohamed, M Hamdan, S Khan, A Abdelaziz, SF Babiker, M Imran, ...
Computer Networks 195, 108151, 2021
Binary LNS-based na´ve Bayes inference engine for spam control: noise analysis and FPGA implementation
MN Marsono, MW El-Kharashi, F Gebali
IET Computers & Digital Techniques 2 (1), 56-62, 2008
Targeting spam control on middleboxes: Spam detection based on layer-3 e-mail content classification
MN Marsono, MW El-Kharashi, F Gebali
Computer Networks 53 (6), 835-848, 2009
Feature selection and machine learning classification for malware detection
BM Khammas, A Monemi, JS Bassi, I Ismail, SM Nor, MN Marsono
Jurnal Teknologi 77 (1), 243-250, 2015
An FPGA-based quantum computing emulation framework based on serial-parallel architecture
YH Lee, M Khalil-Hani, MN Marsono
International Journal of Reconfigurable Computing 2016, 2016
Low latency network-on-chip router microarchitecture using request masking technique
A Monemi, CY Ooi, MN Marsono
International Journal of Reconfigurable Computing 2015, 2-2, 2015
Hardware Acceleration of OpenSSL cryptographic functions for high-performance Internet Security
M Khalil-Hani, VP Nambiar, MN Marsono
2010 International Conference on Intelligent Systems, Modelling andá…, 2010
Online NetFPGA decision tree statistical traffic classifier
A Monemi, R Zarei, MN Marsono
Computer Communications 36 (12), 1329-1340, 2013
FPGA-based real-time moving target detection system for unmanned aerial vehicle application
JW Tang, N Shaikh-Husin, UU Sheikh, MN Marsono
International Journal of Reconfigurable Computing 2016, 2016
A linked list run-length-based single-pass connected component analysis for real-time embedded hardware
JW Tang, N Shaikh-Husin, UU Sheikh, MN Marsono
Journal of Real-Time Image Processing 15, 197-215, 2018
Collaborative detection and mitigation of DDoS in software-defined networks
OE Tayfour, MN Marsono
The Journal of Supercomputing 77, 13166-13190, 2021
Collaborative detection and mitigation of distributed denial-of-service attacks on software-defined network
OE Tayfour, MN Marsono
Mobile Networks and Applications 25, 1338-1347, 2020
Online data stream classification with incremental semi-supervised learning
HR Loo, MN Marsono
Proceedings of the 2nd ACM IKDD Conference on Data Sciences, 132-133, 2015
An accurate FPGA-based hardware emulation on quantum fourier transform
M Khalil-Hani, YH Lee, MN Marsono
Quantum 1, a1b3, 2015
Hardware implementation of evolvable block-based neural networks utilizing a cost efficient sigmoid-like activation function
VP Nambiar, M Khalil-Hani, R Sahnoun, MN Marsono
Neurocomputing 140, 228-241, 2014
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