| Replace: Advancing solution quality and routability validation in global placement CK Cheng, AB Kahng, I Kang, L Wang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 158 | 2018 |
| Toward an open-source digital flow: First learnings from the openroad project T Ajayi, VA Chhabria, M Fogaça, S Hashemi, A Hosny, AB Kahng, M Kim, ... Proceedings of the 56th Annual Design Automation Conference 2019, 1-4, 2019 | 143 | 2019 |
| OpenROAD: Toward a self-driving, open-source digital layout implementation tool chain T Ajayi, D Blaauw Proceedings of Government Microcircuit Applications and Critical Technology …, 2019 | 78 | 2019 |
| TritonRoute: An initial detailed router for advanced VLSI technologies AB Kahng, L Wang, B Xu 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018 | 43 | 2018 |
| 2019 cad contest: Lef/def based global routing S Dolgov, A Volkov, L Wang, B Xu 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-4, 2019 | 37 | 2019 |
| Tritonroute: The open-source detailed router AB Kahng, L Wang, B Xu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 32 | 2020 |
| Improved flop tray-based design implementation for power reduction AB Kahng, J Li, L Wang 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016 | 22 | 2016 |
| The tao of PAO: Anatomy of a pin access oracle for detailed routing AB Kahng, L Wang, B Xu 2020 57th ACM/IEEE design automation conference (DAC), 1-6, 2020 | 21 | 2020 |
| Detailed placement for IR drop mitigation by power staple insertion in sub-10nm VLSI S ik Heo, AB Kahng, M Kim, L Wang, C Yang 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 830-835, 2019 | 19 | 2019 |
| Optimal multi-row detailed placement for yield and model-hardware correlation improvements in sub-10nm VLSI C Han, K Han, AB Kahng, H Lee, L Wang, B Xu Computer-Aided Design (ICCAD), 2017 IEEE/ACM International Conference on …, 2017 | 19 | 2017 |
| Enhanced Optimal Multi-Row Detailed Placement for Neighbor Diffusion Effect Mitigation in Sub-10nm VLSI C Han, AB Kahng, L Wang, B Xu IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2018 | 17 | 2018 |
| ILP-based co-optimization of cut mask layout, dummy fill, and timing for sub-14nm BEOL technology K Han, AB Kahng, H Lee, L Wang Photomask Technology 2015 9635, 80-93, 2015 | 17 | 2015 |
| TritonRoute-WXL: The open-source router with integrated DRC engine AB Kahng, L Wang, B Xu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 16 | 2021 |
| Finding placement-relevant clusters with fast modularity-based clustering M Fogaça, AB Kahng, R Reis, L Wang Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019 | 15 | 2019 |
| Vertical M1 routing-aware detailed placement for congestion and wirelength reduction in sub-10nm nodes P Debacker, K Han, AB Kahng, H Lee, P Raghavan, L Wang Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017 | 15 | 2017 |
| On the superiority of modularity-based clustering for determining placement-relevant clusters M Fogaca, AB Kahng, E Monteiro, R Reis, L Wang, M Woo Integration 74, 32-44, 2020 | 14 | 2020 |
| Performance-and energy-aware optimization of BEOL interconnect stack geometry in advanced technology nodes K Han, AB Kahng, H Lee, L Wang 2017 18th International Symposium on Quality Electronic Design (ISQED), 104-110, 2017 | 6 | 2017 |
| Diffusion break-aware leakage power optimization and detailed placement in sub-10nm VLSI S Heo, AB Kahng, M Kim, L Wang Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019 | 4 | 2019 |
| Wot the L: Analysis of Real versus Random Placed Nets, and Implications for Steiner Tree Heuristics AB Kahng, C Moyes, S Venkatesh, L Wang Proceedings of the 2018 International Symposium on Physical Design, 2-9, 2018 | 1 | 2018 |
| MILP-Based Optimization of 2-D Block Masks for Timing-Aware Dummy Segment Removal in Self-Aligned Multiple Patterning Layouts P Debacker, K Han, AB Kahng, H Lee, P Raghavan, L Wang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 1 | 2017 |
Andrew B. KahngProfessor of CSE and ECE, UC San DiegoVerified email at eng.ucsd.edu
