| Wear leveling of a memory array TJ Fisher, AD Fry, N Ioannou, I Koltsidas, J Ma, RA Pletka, LT Simmons, ... US Patent 9,857,986, 2018 | 76 | 2018 |
| Cooperative data deduplication in a solid state storage array TJ Fisher, N Ioannou, I Koltsidas, RA Pletka, S Tomic US Patent 10,013,169, 2018 | 71 | 2018 |
| Crail: A High-Performance I/O Architecture for Distributed Data Processing. P Stuedi, A Trivedi, J Pfefferle, R Stoica, B Metzler, N Ioannou, I Koltsidas IEEE Data Eng. Bull. 40 (1), 38-49, 2017 | 70 | 2017 |
| Reaping the performance of fast {NVM} storage with {uDepot} K Kourtis, N Ioannou, I Koltsidas 17th USENIX Conference on File and Storage Technologies (FAST 19), 1-15, 2019 | 69 | 2019 |
| Phase-based application-driven hierarchical power management on the single-chip cloud computer N Ioannou, M Kauschke, M Gries, M Cintra 2011 International Conference on Parallel Architectures and Compilation …, 2011 | 64 | 2011 |
| Combining thread level speculation helper threads and runahead execution P Xekalakis, N Ioannou, M Cintra Proceedings of the 23rd international conference on Supercomputing, 410-420, 2009 | 53 | 2009 |
| Metadata hardening and parity accumulation for log-structured arrays I Koltsidas, CJ Camp, N Ioannou, RA Pletka, AK Kourtis, S Tomic, ... US Patent 10,437,670, 2019 | 50 | 2019 |
| Background threshold voltage shifting using base and delta threshold voltage shift values in flash memory CJ Camp, TJ Fisher, AD Fry, N Ioannou, I Koltsidas, N Papandreou, ... US Patent 9,251,909, 2016 | 41* | 2016 |
| Two-level hierarchical log structured array architecture with minimized write amplification R Haas, N Ioannou, I Koltsidas, RA Pletka, AD Walls US Patent 9,619,158, 2017 | 39 | 2017 |
| Detecting error count deviations for non-volatile memory blocks for advanced non-volatile memory block management CJ Camp, TJ Fisher, AD Fry, N Ioannou, R Pletka, S Tomic US Patent 9,563,373, 2017 | 37 | 2017 |
| On The {[Ir] relevance} of Network Performance for Data Processing A Trivedi, P Stuedi, J Pfefferle, R Stoica, B Metzler, I Koltsidas, N Ioannou 8th USENIX Workshop on Hot Topics in Cloud Computing (HotCloud 16), 2016 | 36 | 2016 |
| Techniques for supporting in-place updates with a log-structured array controller Z Barzik, N Ioannou, I Koltsidas, A Margalit US Patent 10,235,283, 2019 | 35 | 2019 |
| Reducing unnecessary calibration of a memory unit for which the error count margin has been exceeded N Ioannou, N Papandreou, RA Pletka, S Tomic US Patent 10,824,352, 2020 | 34 | 2020 |
| Characterization and analysis of bit errors in 3D TLC NAND flash memory N Papandreou, H Pozidis, T Parnell, N Ioannou, R Pletka, S Tomic, ... 2019 IEEE International Reliability Physics Symposium (IRPS), 1-6, 2019 | 34 | 2019 |
| Increasing storage efficiency of a data protection technique RA Pletka, RI Stoica, I Koltsidas, N Ioannou, S Tomic, AK Kourtis, ... US Patent 10,592,173, 2020 | 29 | 2020 |
| Regrouping data during relocation to facilitate write amplification reduction RS Ahmed, CJ Camp, TJ Fisher, AD Fry, N Ioannou, J Ma, MR Orr, ... US Patent 10,884,914, 2021 | 28 | 2021 |
| Non-volatile memory controller cache architecture with support for separation of data streams CJ Camp, TJ Fisher, AD Fry, N Ioannou, I Koltsidas, R Pletka, S Tomic, ... US Patent 9,779,021, 2017 | 28 | 2017 |
| From random block corruption to privilege escalation: A filesystem attack vector for rowhammer-like attacks A Kurmus, N Ioannou, M Neugschwandtner, N Papandreou, T Parnell 11th USENIX Workshop on Offensive Technologies (WOOT 17), 2017 | 28 | 2017 |
| SoftwAre Log-Structured Array (SALSA)—A Unified Stack for SSDs and SMR Disks I Koltsidas, N Ioannou, K Kourtis, T Weigold IBM Research Report, 2015 | 28 | 2015 |
| Snap ML: A hierarchical framework for machine learning C Dünner, T Parnell, D Sarigiannis, N Ioannou, A Anghel, G Ravi, ... Advances in Neural Information Processing Systems 31, 2018 | 27 | 2018 |
Roman PletkaIBM Research - ZurichVerified email at zurich.ibm.com
